Lab 10 of 15 · rank 09
Inputs A0 A1 (A0 the lowest bit). Outputs Y0–Y3: exactly one is 1, the one whose number A1A0 spells. A=0 lights Y0, A=3 lights Y3.
Turn logic into a permanent, verifiable part.
Y0 is NOR(A0, A1) and Y3 is AND(A0, A1). Y1 and Y2 are an AND with one input inverted.
Par is 10 NAND. Using more still passes here. To etch it as a verified die that mines, keep it within 20 NAND-equivalent (a LATCH counts 2): the verifier refuses bigger designs, so padding can't buy mining weight.
Turn this circuit into a verified die you own. It burns 0 NAND. Get materials at the Foundry.