Lab 11 of 15 · rank 10
Inputs A0 A1 B0 B1 (A0/B0 the lowest bit). Outputs EQ (1 when A = B) and GT (1 when A > B).
Turn logic into a permanent, verifiable part.
EQ: both bit pairs equal (two XNORs into an AND). GT: A1 > B1, or the top bits are equal and A0 > B0.
Par is 23 NAND. Using more still passes here. To etch it as a verified die that mines, keep it within 46 NAND-equivalent (a LATCH counts 2): the verifier refuses bigger designs, so padding can't buy mining weight.
Turn this circuit into a verified die you own. It burns 0 NAND. Get materials at the Foundry.