Lab 8 of 15 · rank 07
Inputs A0 A1 B0 B1. Outputs S0 S1 Cout. Treat A1/B1 as MSB.
Learn first
A 2-bit number has two columns: A1 A0. To add two of them, add the right column first (a half adder, no carry in), then feed its carry into the left column (a full adder).
That pattern — carry rippling from column to column — is exactly how the adder in a real CPU works, just with 32 or 64 columns.
Half adder on A0 and B0 gives S0 and a carry. Full adder on A1, B1 and that carry gives S1 and Cout. Try 3 + 1: A=11, B=01 should give S=00 with Cout=1, which is 100 — four.
Turn logic into a permanent, verifiable part.
FA on the low bits with Cin=0, ripple into a second FA.
Par is 18 NAND. Using more still passes here. To etch it as a verified die that mines, keep it within 36 NAND-equivalent (a LATCH counts 2): the verifier refuses bigger designs, so padding can't buy mining weight.
Turn this circuit into a verified die you own. It burns 0 NAND. Get materials at the Foundry.