Lab 6 of 15 · rank 05
Inputs D0, D1, S. Output Y equals D0 when S is 0, D1 when S is 1.
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Imagine a railway junction: one lever chooses which track goes through. When S is 0, Y copies D0; when S is 1, Y copies D1. The other input is ignored.
Computers use thousands of these to route data around. Build it with two ANDs (each one gated by S or not-S) joined by an OR.
Make notS with a NOT. AND D0 with notS; AND D1 with S. OR the two results into Y. Test all eight rows — only S should decide which data line you see.
Turn logic into a permanent, verifiable part.
Y = (D0 AND NOT S) OR (D1 AND S).
Par is 4 NAND. Using more still passes here. To etch it as a verified die that mines, keep it within 8 NAND-equivalent (a LATCH counts 2): the verifier refuses bigger designs, so padding can't buy mining weight.
Turn this circuit into a verified die you own. It burns 0 NAND. Get materials at the Foundry.